Kioxia has a 112-layer 3D TLC NAND flash memory

Kioxia announced the completion of the fifth generation of BiCS FLASH flash memory. This volumetric flash memory has 112 layers. Already in the current quarter, the manufacturer plans to begin supplying trial samples of new memory chips with a density of 512 Gbps (64 GB), capable of storing three bits in each cell (TLC). In the long term, it is planned to produce microcircuits of higher density – 1 Tbit in the case of TLC and 1.33 Tbit in the case of QLC.

According to Kioxia, the new memory is designed for a wide range of applications, including mobile devices, consumer and corporate SSDs, as well as new areas of application emerging with the development of 5G networks, artificial intelligence and self-driving vehicles.

The transition from a 96-layer structure to a 112-layer buyout with circuitry and technological improvements made it possible to increase the layout density by about 20%. The new technology reduces the cost per information volume and increases the information volume per plate. In addition, the interface speeds up by 50% and read and write performance improves.

The fifth generation of BiCS FLASH was developed in conjunction with Western Digital. New chips will be released by the Kioxia factory in Yokkaichi and the new plant in Kitakami.

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